[
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_hit",
    "EventCode": "0x84",
    "BriefDescription": "Instruction fetches that miss in the L1 ITLB but hit in the L2 ITLB."
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if4k",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks requested) for 4k pages.",
    "UMask": "0x01"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if2m",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks requested) for 2M pages.",
    "UMask": "0x02"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.if1g",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks requested) for 1G pages.",
    "UMask": "0x04"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.coalesced_4k",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks requested) for coalesced pages (16k pages created from four adjacent 4k pages).",
    "UMask": "0x08"
  },
  {
    "EventName": "bp_l1_tlb_miss_l2_tlb_miss.all",
    "EventCode": "0x85",
    "BriefDescription": "Instruction fetches that miss in both the L1 and L2 ITLBs (page-table walks requested) for all page sizes.",
    "UMask": "0x0f"
  },
  {
    "EventName": "bp_pipe_correct",
    "EventCode": "0x8b",
    "BriefDescription": "Branch predictor pipeline flushes due to internal conditions such as a second level prediction structure."
  },
  {
    "EventName": "bp_var_target_pred",
    "EventCode": "0x8e",
    "BriefDescription": "Indirect predictions (branch used the indirect predictor to make a prediction)."
  },
  {
    "EventName": "bp_early_redir",
    "EventCode": "0x91",
    "BriefDescription": "Early redirects sent to branch predictor. This happens when either the decoder or dispatch logic is able to detect that the branch predictor needs to be redirected."
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.if4k",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 4k or coalesced pages (16k pages created from four adjacent 4k pages).",
    "UMask": "0x01"
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.if2m",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 2M pages.",
    "UMask": "0x02"
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.if1g",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for 1G pages.",
    "UMask": "0x04"
  },
  {
    "EventName": "bp_l1_tlb_fetch_hit.all",
    "EventCode": "0x94",
    "BriefDescription": "Instruction fetches that hit in the L1 ITLB for all page sizes.",
    "UMask": "0x07"
  },
  {
    "EventName": "bp_fe_redir.resync",
    "EventCode": "0x9f",
    "BriefDescription": "Redirects of the pipeline frontend caused by resyncs. These are retire time pipeline restarts.",
    "UMask": "0x01"
  },
  {
    "EventName": "bp_fe_redir.ex_redir",
    "EventCode": "0x9f",
    "BriefDescription": "Redirects of the pipeline frontend caused by mispredicts. These are used for branch direction correction and handling indirect branch target mispredicts.",
    "UMask": "0x02"
  },
  {
    "EventName": "bp_fe_redir.all",
    "EventCode": "0x9f",
    "BriefDescription": "Redirects of the pipeline frontend caused by any reason."
  }
]