Index of /repos/ports/2024Q4/cad/yosys-systemverilog
Name
Last modified
Size
Description
Parent Directory
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Makefile
2023-07-29 07:39
3.4K
distinfo
2023-06-18 18:10
3.1K
pkg-plist
2023-06-06 22:10
2.0K
pkg-descr
2023-06-06 22:10
123
files/
2023-06-06 22:10
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