=== Marvell ARM64 SoCs support Contact: Zyta Szpak + Contact: Kornel Dulęba + Contact: Marcin Wojtas The Semihalf team is working on improving the FreeBSD support for the link:https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-infrastructure-processors-octeon-tx2-cn913x-product-brief-2020-02.pdf[Marvell Octeon TX2 CN913x] and link:https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-7040-product-brief-2017-12.pdf[Armada 7k]/link:http://wiki.macchiatobin.net/tiki-index.php?page=Armada+8040[8k] SoC families. Marvell Armada 7k8k and Octeon TX2 CN913x SoC families are quad-core 64-bit ARMv8 Cortex-A72 processors with high speed peripherals including 10 Gb Ethernet, PCIe 3.0, SATA 3.0 and USB 3.0 for a wide range of networking, storage, security and industrial applications. Although the mentioned SoCs are mostly supported in FreeBSD HEAD, some pieces required improvements. Applied changes: * Add missing frequency modes in ap806_clock driver (link:https://cgit.freebsd.org/src/commit/?id=a86b0839d7bf3fc06b1ae[commit a86b0839d7bf]) * Multiple fixes in mvebu_gpio driver - in cooperation with mmel (link:https://cgit.freebsd.org/src/commit/?id=a5dce53b75d8750ba[commit a5dce53b75d8]) * Fix device tree data parsing in mv\_ap806\_gicp interrupt controller driver (link:https://cgit.freebsd.org/src/commit/?id=622d17da46eb360c3d684[commit 622d17da46eb]) * Rework the ICU interrupt controller (mv\_cp110\_icu) and its parent (mv\_ap806\_gicp), so that they no longer rely on the data provided by firmware, which fixes booting the OS from the newer U-Boot/TF-A revisions (link:https://reviews.freebsd.org/D28803[D28803]) * PCIE Designware driver (pci_dw) fixes: ** Correct setting of outbound I/O ATU window. ** Allow mapping ATU windows bigger than 4GB. * Generic improvements that enable proper user-space mapping and access of the PCI BARs TODO: * Upstream PCIE improvements. * Improve and merge ICU support rework. Sponsor: Marvell